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Field-programmable gate array
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#	Item
721	Recommended Design Practices Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-19 13:37:56 Clock signal Digital electronics Electronic design Formal methods Clock gating Flip-flop Clock skew Static timing analysis Field-programmable gate array Electronic engineering Electronics Electromagnetism
722	Logic Synthesis for Better Than Worst-case Designs Jason Cong1,2 and Kirill Minkovich1 1 Computer Science Department University of California, Los Angeles 2 Add to Reading List Source URL: cadlab.cs.ucla.edu Language: English - Date: 2009-03-09 16:24:15 Electronic design Integrated circuits Logic synthesis Algorithm Logic optimization Integrated circuit design Field-programmable gate array Application-specific integrated circuit Propagation delay Electronic engineering Electronics Digital electronics
723	EPCQ-L Serial Configuration Devices Datasheet Add to Reading List Source URL: www.altera.com Language: English - Date: 2013-12-02 03:56:37 Pinout Universal Serial Bus Field-programmable gate array Flip-flop 555 timer IC Computer hardware Electronic engineering Electronics
724	Quarterly newsletter for verification engineers About This Issue Welcome to the Advanced Verification Bulletin! With every leap in design complexity, Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:00:59 Logic design Functional verification FPGA prototype Logic simulation Field-programmable gate array Application-specific integrated circuit Verification E Hardware emulation Electronic engineering Digital electronics Hardware verification languages
725	8 Reasons to Use FPGAs in IEC[removed]Functional Safety Applications WP[removed]White Paper Add to Reading List Source URL: www.altera.com Language: English - Date: 2013-08-30 07:44:26 Digital electronics Risk Fabless semiconductor companies Altera Field-programmable gate array Electronic design Electronic design automation Functional Safety Nios II Electronic engineering Safety Electronics
726	Mitigating Single Event Upsets Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-19 13:37:54 Computer memory Single event upset Field-programmable gate array Soft error Altera Error detection and correction Semiconductor intellectual property core Cyclic redundancy check LEON Electronic engineering Digital electronics Electronics
727	Microsoft Word[removed]NHBK[removed]CEG with Change 1.docx Add to Reading List Source URL: www.hq.nasa.gov Language: English - Date: 2011-03-30 09:42:08 Digital electronics Field-programmable gate array Logic design Complex programmable logic device VHDL Application-specific integrated circuit Xilinx Verilog Gate array Electronic engineering Hardware description languages Electronic design
728	Creating a System With Qsys Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-12 19:20:18 Advanced Microcontroller Bus Architecture Field-programmable gate array Communications protocol Interlaken Tab Nios II Computer network Network switch Altera Electronic engineering Computing Data
729	Introduction to Quartus II Software Introduction to Quartus II Software The Altera® Quartus® II design software is a multiplatform design environment that easily adapts to your specific needs in all phases of FPGA an Add to Reading List Source URL: www.altera.com Language: English - Date: 2011-05-03 16:48:08 Digital electronics Integrated circuits Altera Quartus Logic synthesis Altera VHDL Field-programmable gate array Static timing analysis Logic simulation Electronic engineering Electronic design automation Electronic design
730	Embedded Memory Blocks in Arria 10 Devices Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-15 02:31:33 Computer hardware Field-programmable gate array Microcontrollers Random-access memory Electronics Computer memory Electronic engineering Altera

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